I'm a 4th year undergraduate at UC Berkeley, studying CS. My research interests are computer architecture and systems. I am a undergraduate researcher at SLICE Lab where I work on building tools for Chipyard and investigating ML for circuit design applications. I have previous software and hardware engineering experience and have recently spent two summers interning at Apple.
uArchDB is an extensible graph-based microarchitecture event logging API for profiling and debugging open-source processors in RTL. uArchDB is built for the Chipyard hardware design framework and enables users to generate easy to understand waterfall visualizations from their designs. We presented this work at the 2024 SLICE summer research retreat. Check out our poster and presentation.
As part of EE290 Hardware for Machine Learning, we used uArchDB to annotate Gemmini, a systolic array based DNN accelerator. We annotated the fine-grain instruction FSMs, reservation station, systolic-array, scratchpad, and accumulator. We also implemented Gemmini instruction decoding in the backend Python script for readibility in the waterfall viewer. With uArchDB, we could easily visualize the interactions between long latency memory and compute operations in the accelerator. Check out our report.
As part of EE194 Tapeout, we implemented Saturn, a RISC-V Vector Version 1.0 spec compliant microarchitecture on a 2x2mm Intel16 SoC. We implemented 4 in-order Saturn cores with 256-bit vector length register files and 4 KB L1 ICaches and DCaches. We targeted a minimal area configuration optimized for integer operations for ML inference and DSP applications. Our SoC also includes a 1D torus NoC, 256 KB L2 cache, convolution and FFT accelerators, a DMA engine, and 8-channel audio. The chip was accepted by Intel in May 2024 and has arrived for bringup. Check out our poster and presentation.
High-Throughput SAT Sampling [Preprint]
Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek
DAC 2025
DEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits [Preprint]
Arash Ardakani, Minwoo Kang , Kevin He, Qijing Huang, Vighnesh Iyer, Suhong Moon, John Wawrzynek
ASPDAC 2025
Late Breaking Results: Differential and Massively Parallel Sampling of SAT Formulas [Paper]
Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek
DAC 2024